Product Summary
The M74HC165RM13TR is a high speed CMOS 8 bit piso shift register fabricated with silicon gate C2 MOS technology. This device contains eight clocked master slave RS flip-flops connected as a shift register, with auxiliary gating to provide over-riding asynchronous parallel entry. Parallel data enters when the shift/load input is low. The parallel data can change while shift/load is low, provided that the recommended set-up and hold times are observed. For clocked operation, shift/load must be high. The two clock input perform identically; one can be used as a clock inhibit by applying a high signal; to permit this operation clocking is accomplished through a 2 input nor gate.
Parametrics
M74HC165RM13TR absolute maximum ratings: (1)supply voltage: -0.5 to +7 V; (2)DC input voltage: -0.5 to VCC + 0.5 V; (3)DC output voltage: -0.5 to VCC + 0.5 V; (4)DC input diode current: ± 20 mA; (5)DC output diode current: ± 20 mA; (6)DC output current: ± 25 mA; (7)DC VCC or ground current: ± 50 mA; (8)power dissipation: 500(*) mW; (9)storage temperature: -65 to +150°C; (10)lead temperature (10 sec): 300°C.
Features
M74HC165RM13TR features: (1)high spped: tPD = 15ns (TYP.) at VCC = 6V; (2)low power dissipation: ICC =4μA(MAX.) at TA=25°C; (3)high noise immunity: VNIH = VNIL= 28 % VCC (min.); (4)symmetrical output impedance: |IOH| = IOL= 4mA (MIN); (5)balanced propagation delays; (6)wide operating voltage range: VCC (OPR) = 2V to 6V; (7)pin and function compatible with 74 series 165.
Diagrams
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M74HC165RM13TR |
STMicroelectronics |
Counter Shift Registers 8-Bit PISO Shift Reg |
Data Sheet |
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Data Sheet |
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Gates (AND / NAND / OR / NOR) Quad 2-Input NAND |
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